1. Field
Exemplary embodiments of the present invention relate to a memory device, and a memory system including the memory device.
2. Description of the Related Art
Non-volatile memory devices are capable of electrically erasing data, programming new data and retaining the data even though power is turned off. Examples of non-volatile memory devices include flash memories and variable resistive memories. Flash memories are generally categorized in NOR flash memories and NAND flash memories. NOR flash memories have a structure where each memory cell is coupled with a bit line and a word line. This means that each memory cell can be accessed individually, hence NOR flash memories have excellent random access property.
NAND flash memories have a plurality of memory cells coupled in series in a structure known as a cell string. Each cell string has one common bit line contact for all the memory cells in the cell string. As a result, NAND flash memories have excellent integration degree. Because of their high integration degree, NAND flash memories are employed for storing data in diverse devices, such as, for example, mobile devices, various memory cards, solid-state drives (SSD) and so forth.
FIG. 1 illustrates a conventional semiconductor package 100 including a plurality of memory devices 110 and 120.
The memory devices 110 and 120 are mounted on the semiconductor package 100 providing increased storage capacity for the semiconductor package as compared to a semiconductor package having a single memory device. As illustrated in FIG. 1, the memory devices 110 and 120 share a chip enable signal CE.
The chip enable signal CE selects and activates a chip. When the chip enable signal CE is disabled, the memory devices 110 and 120 are in a standby mode consuming a little amount of current. When the chip enable signal CE is enabled, the memory devices 110 and 120 are in an active mode and consume more current.
Since the memory devices 110 and 120 share the chip enable signal CE, the memory devices 110 and 120 go into the active mode simultaneously upon enablement of the chip enable signal CE. However, as only one memory device is accessed at one time in the semiconductor package 100, the simultaneous activation of both of the memory devices 110 and 120 causes wasteful current consumption.